XCV800-4HQ240C- XILINX - VIRTEX™ 2.5 V FIELD PROGRAMMABLE GATE ARRAYS
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Quick Detail:
Virtex™ 2.5 V Field Programmable Gate Arrays
Description:
The Virtex FPGA family delivers high-performance, high-capacity programmable logic solutions. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 5-layer-metal 0.22 µm CMOS process. These advances make Virtex FPGAs powerful and flexible alternatives to mask-programmed gate arrays. The Virtex family comprises the nine members shown in Table 1.
Building on experience gained from previous generations of FPGAs, the Virtex family represents a revolutionary step forward in programmable logic design. Combining a wide variety of programmable system features, a rich hierarchy of fast, flexible interconnect resources, and advanced process technology, the Virtex family delivers a high-speed and high-capacity programmable logic solution that enhances design flexibility while reducing time-to-market.
Applications:
• Fast, high-density Field-Programmable Gate Arrays
- Densities from 50k to 1M system gates
- System performance up to 200 MHz
- 66-MHz PCI Compliant
- Hot-swappable for Compact PCI
• Multi-standard SelectIO™ interfaces
- 16 high-performance interface standards
- Connects directly to ZBTRAM devices
• Built-in clock-management circuitry
- Four dedicated delay-locked loops (DLLs) for advanced clock control
- Four primary low-skew global clock distribution nets, plus 24 secondary local clock nets
• Hierarchical memory system
- LUTs configurable as 16-bit RAM, 32-bit RAM,
16-bit dual-ported RAM, or 16-bit Shift Register
- Configurable synchronous dual-ported 4k-bit RAMs
- Fast interfaces to external high-performance RAMs
• Flexible architecture that balances speed and density
- Dedicated carry logic for high-speed arithmetic
- Dedicated multiplier support
- Cascade chain for wide-input functions
- Abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset
- Internal 3-state bussing
- IEEE 1149.1 boundary-scan logic
- Die-temperature sensor diode
• Supported by FPGA Foundation™ and Alliance Development Systems
- Complete support for Unified Libraries, Relationally Placed Macros, and Design Manager
- Wide selection of PC and workstation platforms
• SRAM-based in-system configuration
- Unlimited re-programmability
- Four programming modes
• 0.22 µm 5-layer metal process
• 100% factory tested
Specifications:
| Datasheets | Virtex 2.5 V |
| PCN Obsolescence | XC1700, 5200, HQ, SCD Families 19/Jul/2010 |
| Standard Package | 1 |
| Category | Integrated Circuits (ICs) |
| Family | Embedded - FPGAs (Field Programmable Gate Array) |
| Series | Virtex® |
| Number of LABs/CLBs | 4704 |
| Number of Logic Elements/Cells | 21168 |
| Total RAM Bits | 114688 |
| Number of I /O | 166 |
| Number of Gates | 888439 |
| Voltage - Supply | 2.375 V ~ 2.625 V |
| Mounting Type | Surface Mount |
| Operating Temperature | 0°C ~ 85°C |
| Package / Case | 240-BFQFP Exposed Pad |
| Supplier Device Package | 240-PQFP (32x32) |
